Code Channel Parameters
Last updated: June 1, 2009
This section is only applicable to the lab application and to a test application with the required feature license.
H-ARQ Modulation
H-ARQ Modulation
setting (corresponds to
ARQMode
in C.S0024-A) determines the modulation type used to transmit the H-ARQ channel when the current physical layer subtype is Subtype 2 (see
Release A Physical Layer Subtype
). The test set transmits H-ARQ bits after receiving the first, second, or third subpacket of a reverse physical layer packet. The
Code Channel Parameters
is used to control what H-ARQ bit (ACK or NAK) is transmitted.
H-ARQ Modulation
|
H-ARQ Modulation
|
ARQMode Value
(C.S0024-A)
|
Description
|
|
Bi-Polar Keying
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0
|
The H-ARQ bit is sent using Bi-Polar keying where a +1 implies an ACK and -1 implies a NAK.
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On-Off Keying
|
1
|
The H-ARQ bit is sent using ACK-oriented On-Off keying where a 1 implies an ACK and 0 implies a NAK.
|
H-ARQ Modulation
setting (
ARQMode
) is a "Configurable Attribute" for the Subtype 3 Reverse Traffic Channel MAC Protocol. It is negotiated with the AT during session negotiation. When a session is open, changing the
H-ARQ Modulation
results in a session re-negotiation. See
Session Negotiate State
for details.
The L-ARQ bit and the P-ARQ bit are modulated using NAK-oriented ON-OFF Keying (0 implies ACK, -1 implies NAK).
ARQ Mode CC
ARQ Mode CC00 setting determines the modulation type used to transmit the H-ARQ channel when the current physical layer subtype is Subtype 3, where CC00 denotes the reverse logical channel CC=00 associated with the Reverse CDMA Channel, see
Fixed Settings
. The test set transmits H-ARQ bits after receiving the first, second, or third subpacket of a reverse physical layer packet. The selection description is the same as
H-ARQ Modulation
.
ARQ Mode CC00
setting is a "Configurable Attribute" for the Subtype 4 Reverse Traffic Channel MAC Protocol. It is negotiated with the AT during session negotiation. When a session is open, changing the
ARQ Mode CC00
results in a session re-negotiation. See
Session Negotiate State
for details.
Operating Considerations
When the current physical layer subtype is Subtype 2 or Subtype 3(see
Release A Physical Layer Subtype
or
Release B Physical Layer Subtype
) and both Cell power and AWGN power are On, the power level of any MAC code channel generated must not be greater than 30dB below the current
Total RF Power
:
-
When any MAC code channel level is changed such that the code level is more than 30 dB below the current Total RF Power, an error message is posted to indicate the error condition. When this happens, the code channel level is rejected (remain at previous setting).
-
When any cell or AWGN power level is changed such that any code channel is more than 30dB below the current Total RF Power, an error message is posted to indicate the error condition. When this happens, the cell or AWGN setting is pended (saved but not applied to the hardware) and the current power setting is not updated (remain at previous setting) until the error condition is removed. See
Cell Power, AWGN (Additive White Gaussian Noise) Power and Total RF Power
.
MAC Code Channels Overview
The code channels generated in the forward MAC channel, their relative levels, and their modulation type depend on the current physical layer subtype (see
Release A Physical Layer Subtype
).
Generated MAC Code Channels When Current Physical Layer is Subtype 0
|
MAC Channels
|
Description
|
|
RPC and DRC Lock (TDM)
|
The RPC and DRC Lock channels are time-division multiplexed (TDM) and BPSK modulated using the same 64-ary walsh code transmitted on either I or Q channel.
-
When an AT is assigned an even numbered MAC index, the RPC and DRC Lock channels are transmitted on the I channel. When an AT is assigned an odd numbered MAC index, the RPC and DRC Lock channels are transmitted on the Q channel.
-
The RPC Channel is transmitted in (
DRC Lock Period
-1) slots out of every
DRC Lock Period
slots. The DRC Lock Channel is transmitted in one out of every
DRC Lock Period
slots.
-
The power levels for the RPC and DRC Lock code channels are fixed by the test set and equally divided between walsh channels (see
RPC Power Level
and
DRC Lock Power Level
).
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RA
|
The RA channel is transmitted using MAC Index 4 with 64-ary walsh code BPSK modulated on I channel. The power level for the RA code channels are fixed by the test set (
RA Bits Power Level
).
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Generated MAC Code Channels When Current Physical Layer is Subtype 2 or Subtype 3
|
MAC Channels
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Description
|
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H-ARQ/L-ARQ and RPC (TDM)
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The H-ARQ/L-ARQ and RPC channels are time-division multiplexed (TDM) and transmitted using the same 128-ary walsh code on either I or Q channel.
-
When an AT is assigned an even numbered
MAC Index
, the H-ARQ/L-ARQ and RPC channels are transmitted on the I channel. When an AT is assigned an odd numbered MAC index, the H-ARQ/L-ARQ and RPC channels are transmitted on the Q channel.
-
The H-ARQ/L-ARQ channel and RPC channel are time division multiplexed (TDM) in a 3 to 1 ratio where the H-ARQ/L-ARQ channel is transmitted for 3 slots and then the RPC channel is transmitted for 1 slot out of every 4 slots.
-
The H-ARQ bit is modulated based on the ARQMode (see
H-ARQ Modulation
). The L-ARQ bit is modulated using NAK-oriented ON-OFF Keying (0 implies ACK, -1 implies NAK). The RPC channel uses the BPSK modulation.
-
The power level of the RPC channel is controlled by
RPC Channel Level
. The power level of the H-ARQ/L-ARQ channel is controlled by
H-ARQ/L-ARQ Channel Level
.
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|
P-ARQ and DRC Lock (TDM)
|
The P-ARQ and DRC Lock channels are time-division multiplexed (TDM) and transmitted using the same 128-ary walsh code on either I or Q channel:
-
When an AT is assigned an even numbered
MAC Index
, the P-ARQ and DRC Lock channels are transmitted on the Q channel. When an AT is assigned an odd numbered MAC index, the P-ARQ and DRC Lock channels are transmitted on the I channel.
-
The P-ARQ and DRC Lock channels are time division multiplexed (TDM) in a 3 to 1 ratio where the P-ARQ channel is transmitted for 3 slots and then the DRC Lock channel is transmitted for 1 slot out of every 4 slots.
-
The P-ARQ bit is modulated using NAK-oriented ON-OFF Keying (0 implies ACK, -1 implies NAK). The DRC Lock channel uses the BPSK modulation
-
The power level of the RPC channel is controlled by
P-ARQ Channel Level
. The power level for the DRC Lock channel is fixed by the test set (see
DRC Lock Power Level
).
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RA
|
The RA channel for physical layer subtype 2 is similar to that of physical layer subtype 0 except for 128-ary walsh code used.
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